MIPS disclosed details of a new M14K core, an upgrade of its M4K core for microcontrollers and a new M14Kc core, an upgrade of its M4KE used in more sophisticated consumer systems. Both support as an ...

MIPS engineers implemented a five-stage pipeline: instruction fetch, read operand and decode instruction, execute, access data memory, and write back results for the R3000. The pipeline lets as many ...

The Godson-2 uses a modified version of the MIPS instruction set that substitutes different instructions in lieu of those patented by MIPS, he said.

For the data plane, Cavium offers the Octeon product family with up to 96 cores using the MIPS-instruction set (from Imagination Technologies Group Plc).

The MIPS Technologies Web site goes on to describe the MIPS64 architecture as one that's based on a fixed-length, regularly encoded instruction set, and one that uses a load/store data model.

Wave will need to ensure that the MIPS Open group protects the instruction set and mandates that participants in the program use the core instruction set in the products they develop, he said.