News

Design-Reuse11h
Sofics Delivers Remarkable PPA & R Performance Near Physical Limits on TSMC 2nm Technology
Sofics’ solutions empower IC design with great Power-Performance-Area and Robustness improvements GISTEL, BELGIUM – June 25, 2025 – Sofics bv, a world leading solution provider specializing in ...
Design And Reuse4h
Enabling Chiplet Design Through Automation and Integration Solutions
Today, many companies are developing multi-die systems. Some, like AMD, Intel, and Nvidia, manage the entire development ...
Design And Reuse4h
BrainChip and HaiLa Partner to Demonstrate Ultra-Low Power Edge AI Connectivity for IoT Sensor Applications
BrainChip Holdings Ltd (ASX: BRN, OTCQX: BRCHF, ADR: BCHPY), the world’s first commercial producer of ultra-low power, fully digital, event-based, brain-inspired AI, today announced a strategic ...
Design And Reuse4h
Siemens streamlines design and analysis of complex, heterogeneously integrated 3D ICs
June 24, 2025 -- Siemens Digital Industries Software today introduced two new solutions to its Electronic Design Automation (EDA) portfolio that help semiconductor design teams address and overcome ...
Design And Reuse23h
Ceva Launches MotionEngine™ Hex: Bringing Precise, Touch-Free, Spatial Control to Smart TV, Gaming, and IoT Interfaces
Absolute Pointing: Unlike relative motion systems, MotionEngine Hex provides absolute cursor positioning based on real-world spatial coordinates, enabling intuitive interactions such as direct ...
Design And Reuse23h
Creonic's DVB-S2 and DVB-S2X IP Cores Now Support the New DVB-NIP Standard
June 24, 2025 --- Creonic’s DVB-S2 and DVB-S2X IP cores now include support for the new DVB-NIP standard on physical layer — an important step toward seamless integration of satellite and IP-based ...
Design And Reuse1d
From I2C to I3C: Evolution of Two-Wire Communication in Embedded Systems
Bus developed by the MIPI Alliance is a two-wire interface built on the foundation of I2C with advancements to improve speed and efficiency. It is designed to replace I2C (and partially SPI) while ...
Design And Reuse1d
Faraday Delivers Latest SerDes IP to Complete Interface Lineup on UMC s 22nm Platform
Faraday has been delivering robust and high-performance SerDes solutions since 2013. Its latest 10G SerDes IP is compliant with multiple key protocols, including PCIe Gen1/2/3, USB 3.2 Gen1/2, and ...
Design And Reuse1d
Mirabilis Design Signs OEM Agreement with Cadence to Deliver VisualSim for System-Level Modeling and Performance Optimization
Mirabilis Design Inc. provides system-level modeling solutions that reduce the risk and time-to-market of complex electronic systems. VisualSim, the company’s flagship product, is used by hundreds of ...
Design And Reuse6d
Why Hardware Security Is Just as Critical as Software Security in Modern Systems
Hardware security — implemented at the silicon level across processors, storage components, input/output devices, and power ...
Design And Reuse1d
Arteris Addresses Silicon Design Reuse Challenge with New Magillem Packaging Product for IP Blocks and Chiplets
As chip design becomes increasingly complex with more components, higher performance demands and tighter timelines, Magillem Packaging helps engineering teams work faster and more efficiently by ...
Design And Reuse1d
Rapidus announces collaboration with Siemens for 2nm semiconductor design
Rapidus Corporation, a manufacturer of advanced logic semiconductors, today announced a strategic collaboration with Siemens Digital Industries Software for semiconductor design and manufacturing ...